Process for forming an FET read only memory device

U.S. Patent Number: 5306657

Abstract: A method of producing a ROM device wherein parallel spaced bit line regions are formed in a semiconductor substrate, blanket layers of (1) polysilicon, (2) etch stop material, and (3) polysilicon, are deposited, the layers etched to form orthogonal parallel word lines on the surface of the substrate, a thick insulating layer deposited over the word lines, a resist layer deposited, exposed and developed to define a desired code implant pattern, the exposed areas of the thick layer removed, and the underlie upper polysilicon layer of the bit line removed, and ion implanted into the substrate to form a code implant.

Inventors: Yang; Ming-Tzong (Hsin Chu, TW)

Assignee: United Microelectronics Corporation (Hsinchu, TW)

Application Number: 08/035,182

Issued: 1994-04-26

Expired: 2006-04-26

Classes: 438/278 ; 257/E21.672; 438/290; 438/291

Field of search: 437/29,45,48,52

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