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Trench isolation for both large and small areas by means of silicon nodules after metal etching
U.S. Patent Number: 5308786
Abstract: A first insulating layer is deposited over the surface of a silicon substrate. Those portions of the first insulating layers not covered by a mask pattern are etched through to the silicon substrate so as to provide a plurality of wide and narrow openings exposing portions of the silicon substrate that will form the device isolation regions. A second insulating layer is deposited overlying the patterned first insulating layer. A layer of an aluminum-silicon alloy is deposited overlying the second insulating layer. The aluminum-silicon layer is etched away whereby silicon nodules are formed on the surface of the second insulating layer. The second insulating layer is etched through to the first insulating layer where it exists and to the silicon substrate surface where the substrate is exposed within the wide and narrow openings. A first set of narrow trenches is etched into the exposed portions of the silicon substrate within the wide and narrow openings using the silicon nodules as a mask. A third insulating layer is deposited over the surface of the substrate and within the first set of trenches. The third insulating layer is etched back to leave spacers on the sidewalls of the first set of trenches which fill the trenches. A second set of trenches is etched into the silicon substrate not covered by a mask wherein the second set of trenches is immediately contiguous with the first set of trenches and wherein the first and second sets of trenches together correspond to the wide and narrow openings.
Inventors: Lur; Water (Taipei, TW); Wu; Jiunn Y. (Dou-Lio, TW); Su; Anna (Hsin-Chu, TW)
Assignee: United Microelectronics Corporation (Hsinchu, TW)
Application Number: 08/127,052
Issued: 1994-05-03
Expired: 2006-05-03
Classes: 438/427 ; 148/DIG.50; 257/510; 257/E21.038; 257/E21.548; 257/E21.554; 438/433
Field of search: 437/67,63,64 148/DIG.50
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