Emitter-coupled logic (ECL) circuit with an inductively coupled output stage for enhanced operating speed

U.S. Patent Number: 5321321

Abstract: An emitter-coupled logic circuit includes a differential pair of transistors and an emitter follower output stage. A load inductor is connected to one of the differential transistors and a load resistor is connected to the other one of the differential transistors. The emitter follower output stage having an input node connected to the load resistor and an output node is connected to a constant current source formed by a current source transistor and an inductor which is AC-coupled to the load inductor by a mutual induction effect. The pull-up and pull-down delay times of the emitter coupled logic circuit can be reduced in a wide range from a light load to a heavy load.

Inventors: Kurisu; Masakazu (Tokyo, JP)

Assignee: NEC Corporation (Tokyo, JP)

Application Number: 07/937,388

Issued: 1994-06-14

Expired: 2006-06-14

Classes: 326/126 ; 257/531; 326/104; 326/17

Field of search: 307/455,246,446,443 257/277,531

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