Static memory with improved write-recovery

U.S. Patent Number: 5369610

Abstract: An improved circuit is provided for extending the write-recovery time of a high speed memory into the next memory access cycle. In the preferred embodiment, the address buffer circuits turn off at a suitable high rate for read but are controlled to turn off more slowly for a write and to thereby extend the write select signal. In a specific address buffer circuit, FETs are supplied a reduced drain-source current during write and thereby are made to switch at a suitably slower speed.

Inventors: Chang; Tung C. (Hsin-chu, TW), Chen; Wei (Saratoga, CA)

Assignee: United Microelectronics Corporation (Hsinchu, TW)

Application Number: 08/157,401

Issued: 1994-11-29

Expired: 2006-11-29

Classes: 365/189.01 ; 365/190; 365/230.06; 365/230.08

Field of search: 365/189.01,190,230.08,230.06

Click the image above to view patent images at uspto.gov within a frame.

Click here for the fulltext page on uspto.gov within a frame.