Resequencing device for a node of a cell switching system

U.S. Patent Number: 5383182

Abstract: The device is for telecommunication networks with an asynchronous transfer mode and contains, in particular: a time stamp generator (TSG), for assigning a time stamp to each cell; a buffer memory (BM); an address memory (FSAM) to memorize the address of the first sub-cell of each cell; a linking memory (LM); a circuit (CU) for finding the buffer memory address containing the first sub-cell of a cell; this circuit comprises, in particular: a memory that is accessible by its content, for memorizing the waiting cell identifiers, each containing the identity of a time period during which the waiting delay of the cell expires, and of the identity of at least one output from which the cell is to be emitted; and a queuing memory for each output, where the order number is recorded each time the waiting delay of at least one cell, which must be emitted from that output, expires; each queuing memory is of the type accessible by its content, and the numbers are searched in ascending order when this output becomes available.

Inventors: Therasse; Yves (Chastre, BE), Guebels; Pierre-Paul F. M. M. (Keerbergen, BE)

Assignee: Alcatel N.V. (Amsterdam, NL)

Application Number: 08/152,594

Issued: 1995-01-17

Expired: 2007-01-17

Classes: 370/394

Field of search: 370/60,60.1,94.1,58.1,58.2,58.3,91,92,93,94.2,99,110.1,825.52,825.51,825.5

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