Method for reduction of off-current in thin film transistors

U.S. Patent Number: 5384271

Abstract: A method of fabricating a thin film transistor having reduced off-current leakage includes the steps of forming a TFT body with a channel region disposed between a source electrode and a drain electrode and then passivating the exposed portion of the channel region. The passivation includes the steps of wet etching the exposed portions of the channel region in an hydrofluoric acid etchant for a first selected etch time; dry etching the exposed channel region in a reactive ion etching procedure for a second selected etch time; wet etching the channel region again with hydrofluoric acid for a third selected etch time; and then treating the channel region with a cleansing agent, such as photoresist stripper; and annealing the exposed portion of the channel region.

Inventors: Kwasnick; Robert F. (Schenectady, NY), Possin; George E. (Schenectady, NY)

Assignee: General Electric Company (Schenectady, NY)

Application Number: 08/130,807

Issued: 1995-01-24

Expired: 2007-01-24

Classes: 438/158 ; 257/E21.414; 438/704; 438/958

Field of search: 437/41,101,909,21,228,40 156/651

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