Process for fabricating a silicide layer in a semiconductor device

U.S. Patent Number: 5384285

Abstract: A transition-metal silicide process includes the formation of a boron nitride capping layer overlying a transition-metal layer. In one embodiment, a transition-metal layer (30) is deposited onto a silicon surface (22), and onto a polysilicon gate electrode (12). A capping layer (32), which can be either boron nitride or boron oxynitride is deposited onto the transition-metal layer (30), and an annealing process is carried out to form a transition-metal/silicon alloy layer (34, 36, 38) at the silicon surface (22), and on the gate electrode (12). The capping layer (32) overlies the transition-metal layer (30) during the annealing process and prevents the formation of an oxide layer at the silicon surfaces (22, 12). After the annealing process is complete, the capping layer (13) is removed by a selective wet etch process, and a second annealing step is carried out to form a transition-metal silicide layer (40, 42, 44).

Inventors: Sitaram; Arkalgud (Austin, TX), Maniar; Papu D. (Austin, TX), Wetzel; Jeffrey T. (Austin, TX)

Assignee: Motorola, Inc. (Schaumburg, IL)

Application Number: 08/096,809

Issued: 1995-01-24

Expired: 2007-01-24

Classes: 438/664 ; 148/DIG.113; 148/DIG.145; 257/E21.165; 438/655

Field of search: 437/200,235,247 148/DIG.113,DIG.145,DIG.15

Click the image above to view patent images at uspto.gov within a frame.

Click here for the fulltext page on uspto.gov within a frame.