Testing method, testing circuit and semiconductor integrated circuit having testing circuit

U.S. Patent Number: 5384533

Abstract: A testing method tests functions of a semiconductor integrated circuit which has a plurality of blocks each having a main block circuit part and an output part. The testing method comprises the steps of supplying a control signal to the output part of each of the blocks in a normal mode so that each output part outputs an output data of the main block circuit part of a corresponding one of the blocks, supplying the control signal and a test data to the output part of each of the blocks in a test mode so that each output part outputs the test data which is supplied to the main block circuit part of another block, and comparing the output data and the test data in the output part of each of the blocks in the test mode and outputting a failure detection signal which is indicative of a failure in a corresponding one of the blocks when the compared output data and test data do not match in the one block.

Inventors: Tokuda; Hideo (Kawasaki, JP), Tanizawa; Tetsu (Kawasaki, JP)

Assignee: Fujitsu Limited (Kawasaki, JP)

Application Number: 08/059,415

Issued: 1995-01-24

Expired: 2007-01-24

Classes: 324/158.1 ; 714/724; 714/736

Field of search: 324/158R,73.1,158.1 371/15.1,16.1,22.1,22.3,22.6,25.1 307/301.1 437/8

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