Storage arrangement and method for operating the arrangement

U.S. Patent Number: 5388070

Abstract: The optimum programming voltage in programmable storage arrangements such as EPROMs and notably EEPROMs is dependent on manufacturing tolerances which are difficult to determine from the outside. Therefore, steps are proposed which enable optimum adjustment of the programming voltage by utilizing an additional transistor with a floating gate which is of the same construction as the transistors of the storage cells and which thus also has the same properties in respect of the programming voltage. This additional transistor is connected in series between the high voltage customarily generated on the chip and the programming voltage input of the actual storage matrix. A description is given of a circuit and a sequence of control voltages required by the circuit so as to adjust the additional transistor.

Inventors: Frerichs; Heinz-Peter (Hamburg, DE)

Assignee: U.S. Philips Corporation (New York, NY)

Application Number: 08/226,227

Issued: 1995-02-07

Expired: 2007-02-07

Classes: 365/185.24 ; 365/104; 365/185.12; 365/185.28; 365/189.09

Field of search: 365/185,189.9,104,182

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