|
Technique to support progressively programmable nonvolatile memory
U.S. Patent Number: 5390317
Abstract: A nonvolatile memory (28) in a data processor (10) is capable of being progressively programmed and/or accessed in a user determined number of sections. A user can program and/or access what appears to the user to be reprogrammable nonvolatile memory (28) at a same address when in actuality the user is programming and accessing sequential sections of nonvolatile memory (28). Nonvolatile information stored in nonvolatile control bits (20) is used to control which section of the nonvolatile memory is connected to a communication bus and is thus accessible to the user. When the user desires to write and/or access a new section of nonvolatile memory (28), either the user directly asserts one of the nonvolatile control bits (20) using software, or the nonvolatile control (24) asserts one of the nonvolatile control bits (20) using hardware.
Inventors: Weiss; Donald G. (Austin, TX), Dobbs; Laura M. (Austin, TX), Thomas; James S. (Austin, TX), Racino; Gregory A. (Austin, TX)
Assignee: Motorola, Inc. (Schaumburg, IL)
Application Number: 08/210,409
Issued: 1995-02-14
Expired: 2007-02-14
Classes: 711/103 ; 365/185.04
Field of search: 395/425 364/2MSFile,9MSFile 365/185,230.03
|
Click the image above to view patent images at uspto.gov within a frame.
Click here for the fulltext page on uspto.gov within a frame.
|