Carry lookahead circuit for semiconductor integrated circuit

U.S. Patent Number: 5394352

Abstract: A carry lookahead circuit for an operation circuit having arithmetic units includes an AND gate and an OR gate for each arithmetic unit. A lookahead carry signal to be inputted to a third arithmetic unit of the operation circuit is the output of the OR gate or the logical sum of the output of the AND gate, which is the logical product of the lookahead carry signal from the OR gate to be inputted to a second arithmetic unit and the carry condition output of the second arithmetic unit, and the carry output signal of the second arithmetic unit. This arrangement can reduce the number of AND gates used in the conventional carry lookahead circuit by two (by(m-3) for m arithmetic units) and will make possible the reduction of the chip-occupying area of the structural elements and the load capacitances of signal transfer paths in the circuit.

Inventors: Nakano; Masako (Kanagawa, JP)

Assignee: NEC Corporation (Tokyo, JP)

Application Number: 08/019,060

Issued: 1995-02-28

Expired: 2007-02-28

Classes: 708/712

Field of search: 364/768,784,786,787,788

Click the image above to view patent images at uspto.gov within a frame.

Click here for the fulltext page on uspto.gov within a frame.