Shared buffer memory type ATM communication system and method with a broadcast facility

U.S. Patent Number: 5394397

Abstract: An ATM switching system which includes an input interface which is provided every incoming line and serves to convert header information of each input cell into internal routing information, a shared buffer memory and a cell writing control unit which forms normal cell list structures, which are prepared in correspondence to outgoing lines and in which a plurality of normal cells are chained together with their next addresses, and a broadcast cell list structure, in which a plurality of broadcast cells are chained together with their next addresses, in the shared buffer memory, and serves to add successively the input cells to ones of the list structures, which are selected in correspondence to respective internal routing information. The invention also includes a cell reading control unit which serves to fetch selectively the cell from the list structures formed in the shared buffer memory to distribute the cell thus fetched to the associated outgoing lines. The cell reading control unit includes a broadcast destination table for "storing broadcast destination specifying information for specifying the outgoing lines, through which the broadcast cell is to be output, using a bit pattern, in correspondence to the internal routing information of the broadcast cell".

Inventors: Yanagi; Junichirou (Kodaira, JP), Ashi; Yoshihiro (Yokohama, JP), Kozaki; Takahiko (Koganei, JP), Takase; Akihiko (Tokyo, JP), Nakashima; Takashi (Yokosuka, JP)

Assignee: Hitachi, Ltd. (Tokyo, JP) Nippon Telegraph and Telephone (Tokyo, JP)

Application Number: 08/038,615

Issued: 1995-02-28

Expired: 2007-02-28

Classes: 370/390 ; 370/393; 370/395.72; 370/432

Field of search: 370/60,60.1,94.1,94.2,58.1,58.2,58.3,110.1

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