Cache system having only entries near block boundaries

U.S. Patent Number: 5394533

Abstract: A data cache, for use in a memory having an address space including tag addresses for identifying blocks of storage locations and a set of select addresses for identifying storage locations in a block, includes a set select decoder that decodes only a subset of said set of select addresses that identify sub-blocks of storage locations located at the upper and lower boundaries of a block. Thus, data in storage locations accessed by addresses near block boundaries which have a high number of bit transitions is registered to the cache so that the high number of bit transitions does not have to be driven on an external bus so that noise is reduced.

Inventors: Doi; Toshio (Hyogo, JP), Mizugaki; Shigeo (Hyogo, JP)

Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP)

Application Number: 07/869,699

Issued: 1995-02-28

Expired: 2007-02-28

Classes: 711/3

Field of search: 395/425,400

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