Method of forming bit lines having lower conductivity in their respective edges

U.S. Patent Number: 5672532

Abstract: A buried bit line ROM is disclosed having orthogonal sets of buried bit lines and polysilicon word lines. Polysilicon spacers are disposed on either side of each of the bit lines. The polysilicon spacers are slightly doped. The bit lines have a doping profile so that the edges of each bit line is doped less and the center of each bit line is doped more.

Inventors: Hsue; Chen Chiu (Hsin-Chu, TW), Hong; Gary (Hsin-Chu, TW)

Assignee: United Microelectronics Corporation (Hsin-Chu, TW)

Application Number: 08/242,787

Issued: 1997-09-30

Expired: 2005-09-30

Classes: 438/278 ; 257/E21.672; 438/301; 438/965

Field of search: 437/47,52,48,45,44 257/390-391

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