EPROM, flash memory with high coupling ratio

U.S. Patent Number: 5675162

Abstract: A semiconductor device is formed on a substrate lightly doped with a dopant, a source region and a drain region in the substrate on the surface thereof, a dielectric layer deposited upon the substrate, a first floating gate layer formed on the dielectric layer, a second floating gate layer formed on the the first floating gate layer, a second dielectric material deposited upon the surface of the first floating gate electrode, a control gate electrode deposited upon the surface of the additional dielectric material, and means for applying a voltage to the control gate electrode.

Inventors: Hong; Gary (Hsin-chu, TW)

Assignee: United Microelectronics Corporation (Hsin-chu, TW)

Application Number: 08/641,411

Issued: 1997-10-07

Expired: 2005-10-07

Classes: 257/316 ; 257/317; 257/324; 257/760; 257/E27.103; 365/185.1

Field of search: 257/316,315,317,314,324,760 365/185.1

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