High voltage metal-oxide semiconductor (MOS) fabrication method

U.S. Patent Number: 5696009

Abstract: A high-voltage MOS (metal-oxide semiconductor) device and a method for fabricating the same is provided. The high-voltage MOS device features the forming of trench-type source/drain structure in substitute of conventional highly doped structure formed by implantation. The improved structure allows the source/drain regions to occupy a small area for layout on the chip. In addition, the forming of the trench-type source/drain structure in N-wells allows an increased current path from the source/drain regions to drift regions, meaning that the conductive path for the current is not limited to only the junction between the source/drain regions and the drift regions as in conventional structures. Moreover, since the trench-type source/drain structure extends upwards from the inside of N-wells to above the surface of isolation layers, metal contact windows can be formed above the isolation layers, thus preventing the occurrence of leakage current.

Inventors: Wen; Jemmy (Hsinchu, TW)

Assignee: United Microelectronics Corporation (TW)

Application Number: 08/749,794

Issued: 1997-12-09

Expired: 2005-12-09

Classes: 438/298 ; 257/E21.432; 257/E21.619; 257/E29.121; 257/E29.266; 257/E29.267; 438/586

Field of search: 437/4R,41R,41RLD,4RG,41RG,29,44,69,203,913

Click the image above to view patent images at uspto.gov within a frame.

Click here for the fulltext page on uspto.gov within a frame.