Asymmetric drain/source layout for robust electrostatic discharge protection

U.S. Patent Number: 5714785

Abstract: A structure is used for electrostatic discharge protection of an integrated circuit. The modified ladder structure includes drain regions which extend from an output pad. These are interleaved with source regions. For example, for a structure with two drain regions and two source regions, a first drain region extending from the output pad is separated from a first source region by a first gate region. A second drain region extending from the output pad is separated from the first drain region by a first insulating region. A second source region is separated from the second drain region by a second gate structure. For a structure with four drain regions and three source regions, there is additionally, a third drain region extending from the output pad. The third drain region is separated from the second source region by a third gate region. A fourth drain region extending from the output pad is separated from the third drain region by a second insulating region. A third source region is separated from the fourth drain region by a fourth gate region.

Inventors: Jiang; Chun (San Jose, CA)

Assignee: VLSI Technology, Inc. (San Jose, CA)

Application Number: 08/586,042

Issued: 1998-02-03

Expired: 2006-02-03

Classes: 257/360 ; 257/361

Field of search: 257/360,361,355

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