Method of fabricating a high voltage metal-oxide semiconductor (MOS) device

U.S. Patent Number: 5716886

Abstract: A high-voltage MOS (metal-oxide semiconductor) device and a method for fabricating the same is provided. The high-voltage MOS device features the forming of trench-type source/drain regions by the use of silicon nitride layers to conduct a self-alignment etching process on a polysilicon conductive layer. In addition, an insulating layer is formed between the source/drain regions and the substrate, which prevents the breakdown at the junction between the source/drain regions and the substrate and also prevent the occurrence of leakage current therein. The forming of metal contact windows on the source/drain regions over isolation layers also allows the prevention of over etching, the occurrence of metal spikes, and misalignment of critical dimensions on the substrate. The thus fabricated high-voltage MOS device is therefore more reliable.

Inventors: Wen; Jemmy (Hsinchu, TW)

Assignee: United Microelectronics Corporation (TW)

Application Number: 08/751,718

Issued: 1998-02-10

Expired: 2006-02-10

Classes: 438/299 ; 257/E21.431; 257/E29.021; 257/E29.04; 257/E29.121; 438/294; 438/298; 438/430

Field of search: 437/4R,41R,44,913,69,29,203,4RG,41RG

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