Method of manufacturing semiconductor device

U.S. Patent Number: 5739044

Abstract: After selectively forming P.sub.+ -type gate regions 14 in the upper surface of a first N.sup.- -type semiconductor substrate 10, gate electrodes 30 are selectively formed on the P.sup.+ -type gate regions. A P.sup.+ -type layer 12 is formed in the lower surface of the N.sup.- -type substrate 10. Recessed portions 26 which can house the gate electrodes are formed in the lower surface of the second N.sup.- -type semiconductor substrate 20 and an N.sup.+ -type layer 22 is formed in the upper surface thereof. After removing impurities from the surfaces of the first and second semiconductor substrates 10 and 20 by RCA cleaning, the surfaces are cleaned with a pure water and are dried by a spinner. Then the substrates 10 and 20 are joined to each other by heating the substrates 10 and 20 at 700.degree.-1100.degree. C. in an H.sub.2 atmosphere, while the upper surface of the first semiconductor substrate 10 is brought into contact with projected portions 29 on the lower surface of the second semiconductor substrate 20. Thus there can be obtained a static induction thyristor, static induction transistor or gate turn-off thyristor, in each of which gate regions and gate electrodes are buried within a semiconductor substrate.

Inventors: Terasawa; Yoshio (Katsuta, JP)

Assignee: NGK Insulators, Ltd. (JP)

Application Number: 08/728,147

Issued: 1998-04-14

Expired: 2006-04-14

Classes: 438/137 ; 257/E21.362; 257/E21.388; 257/E21.401; 257/E29.194; 438/193

Field of search: 437/40,41,29,6 257/136,144,146,153,170

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