Polysilicon trench and buried wall device structures

U.S. Patent Number: 5744847

Abstract: This invention describes a device structure and a method of forming the device structure using trenches with sidewalls formed in the substrate of an integrated circuit. A highly doped polysilicon layer is formed on the walls of the trench or the trench is filled with highly doped polysilicon to form the source and drain of a field effect transistor in an integrated circuit. The invention provides reduced source and drain resistance. The capacitances between the gate and source and the gate and drain are reduced as well.

Inventors: Wen; Jemmy (Hsinchu, TW)

Assignee: United Microelectronics Corporation (TW)

Application Number: 08/923,547

Issued: 1998-04-28

Expired: 2006-04-28

Classes: 257/397 ; 257/302; 257/316; 257/330; 257/332; 257/334; 257/398; 257/903; 257/E21.431; 257/E21.619; 257/E29.021; 257/E29.04; 438/257; 438/265

Field of search: 257/302,332,334,903,316,330,398,397 437/203 438/257,265

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