Method and apparatus for reordering memory operations along multiple execution paths in a processor

U.S. Patent Number: 6381691

Abstract: A method is provided for scheduling instructions for execution along multiple paths in a Computer processing system implementing out-of-order execution. The method includes the step of selecting and moving a next instruction from its current position in a sequence of instructions to an earlier position. It is determined whether the selected instruction may reference a memory location for read-access. It is determined whether the selected instruction was previously moved over a non-selected instruction which may ambiguously reference the memory location, when the selected instruction may reference the memory location for read-access. It is determined whether the selected instruction was previously moved over a branch instruction, when the selected instruction was previously moved over the non-selected instruction. A record of the selected instruction is stored for future reference, when the selected instruction was previously moved over the branch instruction. The record includes a path specifier for indicating a path from a current locus of execution to a basic block corresponding to a in-order position of the selected instruction.

Inventors: Altman; Erik (Danbury, CT); Gschwind; Michael K. (Danbury, CT)

Assignee: International Business Machines Corporation (Armonk, NY)

Application Number: 09/374,255

Issued: 2002-04-30

Expired: 2006-04-30

Classes: 712/236 ; 712/216

Field of search: 712/236,216,23 717/6

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