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Expired patents of:
United Microelectronics Corporation

Displaying 1 to 50 of 119 patents. (Retrieval took 4.061 seconds.)

 Patent TitleExpired:
1.Trench isolation for semiconductor device with lateral projections above substrate2006-12-31
2.Method of fabricating dynamic random access memory2006-12-22
3.Method of forming a rugged polysilicon fin structure in DRAM2006-12-22
4.Static memory with improved write-recovery2006-11-29
5.Apparatus and method of filtering a signal utilizing recursion and decimation2006-11-24
6.VLSI process with global planarization2006-11-22
7.Rugged polysilicon process for DRAM capacitors2006-11-17
8.Method of measuring the threshold voltage of metal-oxide semiconductor field-effect transistors2006-11-17
9.Tungsten-plug process2006-11-15
10.Multi-level conduction structure for VLSI circuits2006-10-27
11.Multilayer polysilicon gate self-align process for VLSI CMOS device2006-09-27
12.Compact contactless trenched flash memory cell2006-08-18
13.Method of making 0.6 micrometer word line pitch ROM cell by 0.6 micrometer technology2006-07-19
14.Process of fabricating NAND-structure flash EEPROM using liquid phase deposition2006-06-23
15.Process for evenly depositing ions using a tilting and rotating platform2006-06-09
16.Method for forming a semiconductor memory device with a capacitor2006-06-09
17.Method for making a high density ROM or EPROM integrated circuit2006-06-07
18.Process for evenly depositing ions using a tilting and rotating platform2006-06-02
19.Drain off-set for pull down transistor for low leakage SRAM's2006-05-26
20.Method of making self-aligned double density polysilicon lines for EPROM2006-05-10
21.Mask ROM process2006-05-03
22.Trench isolation for both large and small areas by means of silicon nodules after metal etching2006-05-03
23.Uniform field oxidation for locos isolation2006-05-03
24.Process of making a storage capacitor for dram memory cell2006-04-28
25.Polysilicon trench and buried wall device structures2006-04-28
26.Process for forming an FET read only memory device2006-04-26
27.Mask ROM cell structure with multi-level data selection by code2006-04-07
28.Polycide bonding pad structure2006-03-31
29.Method of fabricating a flash memory cell2006-03-29
30.Low temperature method of manufacturing epitaxial titanium silicide2006-03-24
31.Trench isolation with global planarization using flood exposure2006-03-15
32.Silicon-rich tunnel oxide formed by oxygen implantation for flash EEPROM2006-03-10
33.High density flash EPROM2006-02-24
34.Method of fabricating a high voltage metal-oxide semiconductor (MOS) device2006-02-10
35.Field effect transistor with recessed buried source and drain regions2006-01-06
36.Expandable repeater controller2005-12-30
37.Sub-resolution phase shift mask2005-12-16
38.High voltage metal-oxide semiconductor (MOS) fabrication method2005-12-09
39.Method and apparatus for performing chemical vapor deposition2005-11-25
40.Electrically erasable read only memory cell array having elongated control gate in a trench2005-11-02
41.Apparatus for cleaning an air pump silencer2005-10-21
42.EPROM, flash memory with high coupling ratio2005-10-07
43.Method of forming bit lines having lower conductivity in their respective edges2005-09-30
44.Process for fabricating capacitor cells in dynamic random access memory (DRAM) chips2005-09-30
45.Process for creating high density integrated circuits utilizing double coating photoresist mask2005-09-16
46.Process for fabricating multi-level read-only memory device2005-09-16
47.Process for fabricating tantalum nitride diffusion barrier for copper matallization2005-09-16
48.Read-only-memory process with self-aligned coding2005-09-09
49.Method for fabricating trench/stacked capacitors on DRAM cells with increased capacitance2005-09-09
50.Stress relaxation in dielectric before metalization2005-09-09

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