Search
Top Companies

Classes by alpha

Search

Under Construction

Disclaimer

Expired patents of:
VLSI Technology, Inc.

Displaying 1 to 50 of 266 patents. (Retrieval took 3.044 seconds.)

 Patent TitleExpired:
1.SRAM memory cell with tri-level local interconnect2007-02-28
2.Per-wafer method for globally stressing gate oxide during device fabrication2007-02-21
3.Wet/dry anti-fuse via etch2007-02-21
4.Semiconductor wafer defect monitoring2007-02-21
5.Programmable memory addressing2007-02-21
6.Method for automatic isolation of functional blocks within integrated circuits2007-02-21
7.Method for manufacturing anti-fuse structures2007-02-07
8.Apparatus and method for thermally coupling a heat sink to a lead frame2007-02-07
9.VGA controller using address translation to drive a dual scan LCD panel and method therefor2007-02-07
10.FIFO memory using single output register2007-02-07
11.Data processor system with instruction substitution filter for deimplementing instructions2007-01-19
12.Docking handle2007-01-17
13.Data-packet fifo buffer system with end-of-packet flags2007-01-12
14.Integrated circuit package with stabilizer bar2007-01-10
15.Method of fabricating a programmable function system block using two masks and a sacrificial oxide layer between the bottom metal and an amorphous silicon antifuse structure2007-01-05
16.Method for automatically routing circuits of very large scale integration (VLSI)2007-01-05
17.Apparatus for thermally coupling a heat sink to a lead frame2007-01-03
18.Design for encapsulation of thermally enhanced integrated circuits2007-01-03
19.High density leaded ball-grid array package2006-12-29
20.Process control monitoring system and method therefor2006-12-29
21.Wire support and guide2006-12-27
22.Improved pad ring router2006-12-27
23.Method and apparatus for detecting edges under an opaque layer2006-12-22
24.EEPROM cell with improved tunneling properties2006-12-06
25.Technique and apparatus for testing an electrically programmable ROM embedded among other digital circuitry on an IC chip2006-12-06
26.Adaptive arbitration mechanism for a shared multi-master bus2006-12-01
27.Method and apparatus for cooling a molded-plastic integrated-circuit package2006-11-29
28.Method and apparatus for VCO modulation in a communication system2006-11-26
29.Method for creating on-package inductors for use with integrated circuits2006-11-24
30.Apparatus and method for synthesizing integrated circuits using parameterized HDL modules2006-11-24
31.Method and apparatus for verifying signal timing of electrical circuits2006-11-24
32.Memory programming and test circuitry and methods for implementing the same2006-11-24
33.Integrated circuit package design having an intermediate die-attach substrate bonded to a leadframe2006-11-15
34.Method of making high resistive structures in salicided process semiconductor devices2006-11-10
35.Method for measuring alignment accuracy in a step and repeat system utilizing different intervals2006-11-03
36.Programmable semiconductor device structures and methods for making the same2006-10-29
37.Chip on board package with top and bottom terminals2006-10-27
38.Arrangement for selective generation of an output signal related to a clock signal and method therefor2006-10-27
39.Reprogrammable state machine and method therefor2006-10-20
40.Packaging assemblies for encapsulated integrated circuit devices2006-10-20
41.Automatic virtual display panning circuit for providing VGA display data to a lower resolution display and method therefor2006-10-06
42.Wire length minimization in channel compactor2006-10-04
43.Plasma ashing enhancement2006-09-29
44.Method of measuring energy consumption in a circuit simulator2006-09-29
45.Signed two's complement constant multiplier compiler2006-09-27
46.Method for storing and transferring wave table audio samples using a DSP cache, a link list structure, and compression2006-09-22
47.Method for optimally placing components of a VLSI circuit2006-09-20
48.Method for sizing widths of power busses in integrated circuits2006-09-20
49.Memory compiler with multiple selectable core elements2006-09-20
50.System for implementing peripheral device bus mastering in desktop PC via hardware state machine for programming DMA controller, generating command signals and receiving completion status2006-09-15

Pages: 1 | 2 | 3 | 4 | 5 | 6 |

Questions or comments? Send us a note!

Home | Top Companies | Classes by alpha | Search | Under Construction | Disclaimer | Contact us